//////////////////////////////////////////ok
#include"stdafx.h"
#include "bochs.h"



void IA32_CPU::LES_GvMp(Ia32_Instruction_c *i)
{
  if (i->modC0()) 
  {
    UndefinedOpcode(i);
  }

  if (i->os32L()) 
  {
    Bit16u es;
    Bit32u reg_32;

    read_virtual_dword(i->seg(), IA32_RMAddr(i), &reg_32);
    read_virtual_word(i->seg(), IA32_RMAddr(i) + 4, &es);
    load_seg_reg(&this-> sregs[IA32_SEG_REG_ES], es);
    IA32_WRITE_32BIT_REGZ(i->nnn(), reg_32);
  }
  else
  { /* 16 bit mode */
    Bit16u reg_16, es;
    read_virtual_word(i->seg(), IA32_RMAddr(i), &reg_16);
    read_virtual_word(i->seg(), IA32_RMAddr(i) + 2, &es);
    load_seg_reg(&this-> sregs[IA32_SEG_REG_ES], es);
    IA32_WRITE_16BIT_REG(i->nnn(), reg_16);
  }
}

void IA32_CPU::LDS_GvMp(Ia32_Instruction_c *i)
{
  if (i->modC0()) 
  {
    UndefinedOpcode(i);
  }

  if (i->os32L()) 
  {
    Bit16u ds;
    Bit32u reg_32;
    read_virtual_dword(i->seg(), IA32_RMAddr(i), &reg_32);
    read_virtual_word(i->seg(), IA32_RMAddr(i) + 4, &ds);
    load_seg_reg(&this-> sregs[IA32_SEG_REG_DS], ds);
    IA32_WRITE_32BIT_REGZ(i->nnn(), reg_32);
  }
  else
  { /* 16 bit mode */
    Bit16u reg_16, ds;
    read_virtual_word(i->seg(), IA32_RMAddr(i), &reg_16);
    read_virtual_word(i->seg(), IA32_RMAddr(i) + 2, &ds);
    load_seg_reg(&this-> sregs[IA32_SEG_REG_DS], ds);
    IA32_WRITE_16BIT_REG(i->nnn(), reg_16);
  }
}


void IA32_CPU::LFS_GvMp(Ia32_Instruction_c *i)
{
  if (i->modC0()) 
  {
    UndefinedOpcode(i);
  }

  if (i->os32L()) 
  {
    Bit32u reg_32;
    Bit16u fs;
    read_virtual_dword(i->seg(), IA32_RMAddr(i), &reg_32);
    read_virtual_word(i->seg(), IA32_RMAddr(i) + 4, &fs);
    load_seg_reg(&this-> sregs[IA32_SEG_REG_FS], fs);
    IA32_WRITE_32BIT_REGZ(i->nnn(), reg_32);
  }
  else 
  { /* 16 bit operand size */
    Bit16u reg_16;
    Bit16u fs;
    read_virtual_word(i->seg(), IA32_RMAddr(i), &reg_16);
    read_virtual_word(i->seg(), IA32_RMAddr(i) + 2, &fs);
    load_seg_reg(&this-> sregs[IA32_SEG_REG_FS], fs);
    IA32_WRITE_16BIT_REG(i->nnn(), reg_16);
  }
}

void IA32_CPU::LGS_GvMp(Ia32_Instruction_c *i)
{
  if (i->modC0()) 
  {
    UndefinedOpcode(i);
  }

  if (i->os32L()) 
  {
    Bit32u reg_32;
    Bit16u gs;
    read_virtual_dword(i->seg(), IA32_RMAddr(i), &reg_32);
    read_virtual_word(i->seg(), IA32_RMAddr(i) + 4, &gs);
    load_seg_reg(&this-> sregs[IA32_SEG_REG_GS], gs);
    IA32_WRITE_32BIT_REGZ(i->nnn(), reg_32);
  }
  else 
  { /* 16 bit operand size */
    Bit16u reg_16;
    Bit16u gs;
    read_virtual_word(i->seg(), IA32_RMAddr(i), &reg_16);
    read_virtual_word(i->seg(), IA32_RMAddr(i) + 2, &gs);
    load_seg_reg(&this-> sregs[IA32_SEG_REG_GS], gs);
    IA32_WRITE_16BIT_REG(i->nnn(), reg_16);
  }
}

void IA32_CPU::LSS_GvMp(Ia32_Instruction_c *i)
{
  if (i->modC0()) 
  {
    UndefinedOpcode(i);
  }

  if (i->os32L()) 
  {
    Bit32u reg_32;
    Bit16u ss_raw;
    read_virtual_dword(i->seg(), IA32_RMAddr(i), &reg_32);
    read_virtual_word(i->seg(), IA32_RMAddr(i) + 4, &ss_raw);
    load_seg_reg(&this-> sregs[IA32_SEG_REG_SS], ss_raw);
    IA32_WRITE_32BIT_REGZ(i->nnn(), reg_32);
  }
  else 
  { /* 16 bit operand size */
    Bit16u reg_16;
    Bit16u ss_raw;
    read_virtual_word(i->seg(), IA32_RMAddr(i), &reg_16);
    read_virtual_word(i->seg(), IA32_RMAddr(i) + 2, &ss_raw);
    load_seg_reg(&this-> sregs[IA32_SEG_REG_SS], ss_raw);
    IA32_WRITE_16BIT_REG(i->nnn(), reg_16);
  }
}

